(1) Field of the Invention
The present invention relates to a signal loopback device for use in, for example, a remote supervisory control by returning a signal, and in particular to a signal loopback device suitable for use in a DS3 signal loopback conforming to North American DS3 C-bit parity system (TR-NWT-000499 Issue5).
Due to a lack of additional available bits, it is difficult to adapt a conventional North American DS3 signal to more enhanced network surveillance such as remote supervisory control. In order to overcome the problem, Bellcore (North America) has recommended the DS3 C-bit parity system.
In the system, by using a C-bit in the DS3 signal originally serving as a stuff bit, it is possible to transmit various information such as office alarm, a data link signal, and so forth.
(2) Description of the Related Art
In conventional maintenance of communication equipment, a loopback test is made to directly return output from a transmitting configuration of the communication equipment to a receiving configuration, thereby deciding whether or not the communication equipment normally functions.
Further, a system using a stuff bit is employed to transmit a loopback control signal, and a loopback circuit is realized by a selector circuit to select an input and returned signal and a normal output signal in the ratio of 2:1.
Meanwhile, an erroneous loopback control must be avoided as far as possible because the erroneous loopback control instantaneously interrupts a communication line. In particular, it is necessary to consider, for example, protection against a malfunction due to an error (degradation in line quality, and so forth).
In addition, since a loopback execution/cancellation signal is sent for each channel (CH), a measure for each channel is required in a detecting circuit (hardware) in consideration of a possible failure in a remote station (control station) with the loopback control uncanceled. Besides, it is also necessary to detect the failure of the remote station by any means, and clear a loopback control state prior to the failure by the failure detection.
With attention to the signal loopback conforming to the DS3 C-bit parity system, a DS3 signal is sent at a very high speed of 44.736 MHz, and a pulse mask for an output waveform is typically generated directly from a logic circuit such as LSI. Thus, it is required to avoid distortion of the output waveform. In clock switching by the conventional selector, different logic circuits are required for loopback execution and a normal operation so that a variation is naturally caused in distortion of the output waveform, resulting in a variation in characteristics.
Further, when the input DS3 signal to be looped back is returned by the logic circuit, the signal is typically returned after a bipolar signal is decoded into an NRZ (Non-Return to Zero) signal in a decoder circuit. However, there is a problem in that it is more desirable to return the signal without any signal processing.
In view of the foregoing problems, it is an object of the present invention to provide a signal loopback device which can ensure protection against a malfunction in consideration of erroneous signal detection due to degradation in circuit quality, can independently detect for each channel a loopback execution/cancellation signal sent for each channel by common hardware, and can also detect a failure of a remote station, thereby clearing a loopback control state prior to the failure.
According to the present invention, for achieving the above-mentioned objects, there is provided a signal loopback device including a multiplexing/demultiplexing unit to carry out multiplexing/demultiplexing between a DS3 signal serving as a digital signal conforming to a DS3 C-bit parity system and a DS1 signal serving as a digital signal having a lower speed than that of the DS3 signal, a DS1 signal loopback storage unit mounted on the side of DS1 signal input-output of the multiplexing/demultiplexing unit to temporarily contain the DS1 signal, and read the stored DS1 signal, thereby returning the DS1 signal, a DS3 signal loopback storage unit mounted on the side of DS3 signal input-output of the multiplexing/demultiplexing unit to temporarily contain the DS3 signal, and read the stored DS3 signal, thereby returning the DS3 signal in an original input signal format, a selecting unit to select any one of DS3 signal output from the multiplexing/demultiplexing unit and a DS3 loopback signal from the DS3 signal loopback storage unit, a protected detecting unit to output, when detecting loopback execution-cancellation information from a C-bit in the DS3 signal plurality of times, a result of detection showing that loopback is to be executed or canceled, and a loopback-control unit to make a control for loopback execution or loopback cancellation to the DS1 signal loopback storage unit, the DS3 signal loopback storage unit, and the selecting unit depending upon the result of detection in the protected detecting unit.
Thus, according to the signal loopback device according to the present invention, even in a state in which an error occurs in a line (degradation in, for example, line quality occurs), loopback execution/cancellation can be ensured, resulting in an advantage that an erroneous control of the loopback can be prevented. In addition, signal output can be made without clock switching by the selecting unit to select any one of the DS3 signal output from the multiplexing/demultiplexing unit and the DS3 loopback signal from the DS3 signal loopback storage unit, resulting in no variation in output waveform. Thus, there is another advantage in that an output waveform can be kept constant irrespective of whether the loopback is in execution or left unexecuted.
On the other hand, there is provided a signal loopback device according to the present invention including a loopback unit capable of temporarily containing a digital input signal input through an input line, and returning the digital input signal in an original input signal format to an output line for loopback, a protected detecting unit to output, when detecting loopback execution/cancellation information from the digital input signal plurality of times, a result of detection showing that the loopback is to be executed or canceled, and a loopback control unit to make a control for loopback execution or loopback cancellation to the loopback unit depending upon the result of detection in the protected detecting unit.
Therefore, according to the signal loopback device of the present invention, the loopback unit includes a storage unit to temporarily contain the digital input signal, the storage unit is written according to a write clock in synchronization with a receive clock, and the storage unit is read according a read clock in synchronization with the receive clock. As a result, there is another advantage in that a loss of data can be prevented.